shuklaanuj059

Forum role	Member since	Last activity	Topics created	Replies created
Member	Nov 23, 2015 (10 years)	-	1	0

Forum role: Member
Member since: Nov 23, 2015 (10 years)
Last activity: -
Topics created: 1
Replies created: 0

Bio

◆Knowledge in the area of Digital Electronics and writing synthesizable RTL models in Verilog HDL. ◆Experience in writing reusable testbenches in System Verilog and UVM (Including functional coverage and assertion-based verification). ◆Good knowledge of DFT concepts ◆Knowledge of SPI protocol. ◆Familiar with industry-standard tools like Xilinx ISE(1 4.7), Riviera Pro, QuestaSim and Tessent ◆ Perl for scripting.

shuklaanuj059

shuklaanuj059

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